With the development of power electronics in recent years, the half-bridge drive circuit is developing in the direction of high power density and high frequency, which puts forward new requirements for power transistor selection and circuit design. In the conventional half-bridge drive circuit, generally, silicon power transistors serve as the power stage. The solutions of the conventional silicon technique face a lot of challenges from the application requirements. In contrast, since the GaN power switch device (e.g. GaN high electron mobility transistor: GaN HEMT which is taken for example below) has excellent physical properties such as less gate charge Qg, high breakdown voltage, and requiring no reverse recovery time, the GaN power switch device is allowed to work under a higher switching frequencies with a higher efficiency for power conversion. Therefore, half-bridge gate drive circuit using the GaN power switch devices have excellent characteristics such as high speed, high power density, etc.
FIG. 1 and FIG. 5 show a conventional bootstrap charging circuit where Si power switch devices are applicable. The circuit charges the bootstrap capacitor Cboot during the dead time and the on state of the lower power transistor, and supplies power to high-side gate driving during the on state of the upper power transistor. For a half-bridge gate drive circuit, the conventional bootstrap charging circuit is no longer suitable for the GaN power switch device as a floating power rail generating circuit. First, when the conventional bootstrap charging circuit works in the state of charging the bootstrap capacitor Cboot, the electric potential of the upper electrode plate of the bootstrap capacitor Cboot approximates the internal power supply voltage VDD of the chip, and the electric potential of the lower electrode plate is the power switch node voltage SW. While, when the GaN HEMT is turned off and the current flows from the source to the drain, the drain-source voltage VDS will have a negative voltage ranging from −2 V to −3V. Therefore, in the half-bridge drive circuit, when the GaN HEMT is used as the low power transistor, a negative power stage bias voltage VSW may occur due to the sink current applied to the external load during the dead time. The higher the load current, the lower is the negative voltage, so that the bootstrap capacitor Cboot may be overcharged to be much higher than the internal power supply voltage VDD of the chip, thus causing gate-source breakdown of the GaN power switch device. The gate-source breakdown voltage of GaN HEMT is relatively smaller, the VGS is required to be smaller than 6V, and the optimum drive voltage is equal to or less than 5.5V. Therefore, the conventional bootstrap charging circuit should be added with control to avoid charging of the bootstrap capacitor Cboot during the dead time. Second, since GaN HEMTs are mostly used in high-voltage, high-frequency circumstances, the circuit requires high load carrying capacity for the bootstrap charging circuit and the bootstrap charging circuit should be able to be used for high frequency power supply in MHz range. However, the on-chip high-withstand-voltage fast-recovery power diode is difficult to be realized in the semiconductor process, and the performance of the fully integrated high-voltage power diode under high-frequency power supply will be seriously degraded due to the reverse recovery time and parasitic capacitance, which makes the conventional bootstrap charging circuit unable to fill up the consumed charges of the bootstrap capacitor Cboot in time under the application requirements of high frequency and high power density, thereby affecting the voltage difference of the floating power rail BST relative to the switch node SW. Therefore, the performance of the high-side drive circuit is degraded, the switching loss of the upper power transistor is increased, and even the undervoltage protection is triggered to cause failure of the circuit.
Specifically, FIG. 5 shows a typical gate drive topology suitable for silicon power switch devices. The bootstrap capacitor Cboot supplies power to the high-side drive circuit. The bootstrap capacitor Cboot needs to be charged in the system to ensure that the upper power transistor MH can be normally turned on. In the conventional bootstrap charging circuit applied to silicon power devices, usually, the low-voltage power supply VDD is directly connected to the bootstrap diode Dboot to charge the bootstrap capacitor Cboot. The charging mainly occurs in the dead time and the on state of the lower power transistor. When the bootstrap capacitor Cboot is getting charged, the anode potential of the bootstrap capacitor Cboot approximates to the internal power supply voltage VDD, and the cathode potential approximates to that of the switch node SW. During the dead time of the switch node SW, since the upper power transistor MH and the lower power transistor ML are turned off, the freewheeling current will flow from the source of the lower power transistor ML to the drain. For the case that the GaN HEMT device is used as the power stage, the voltage of the drain of the lower power transistor ML, i.e. the switching node SW, is dropped to a negative voltage value in a range from −2 V to −3 V. The larger the load current, the lower is the negative voltage, which leads to a voltage of the bootstrap capacitor Cboot much higher than the internal power supply voltage VDD. Moreover, the gate-source breakdown voltage of the GaN HEMT is relatively smaller, and the gate-source voltage of the GaN HEMT should usually be limited within 5.5 V. Therefore, the excessive voltage of the bootstrap capacitor Cboot will cause the gate and source breakdown of the GaN power transistor.
In addition, due to the application requirements of the GaN HEMTs, the gate drive circuit requires high load carrying capacity for the bootstrap charging circuit to meet the power supply in the applications of high frequency and high voltage, the conventional charging circuit using the high-voltage power diode Dboot for charging is no longer suitable for high-frequency charging applications due to the limits of the high-voltage power diode Dboot. When the fully integrated high-voltage power diode Dboot operates at high frequency, the reverse recovery effect thereof is more serious and the parasitic capacitance is larger, resulting in a severe degradation of the performance of the high-voltage power diode Dboot. Therefore, for the traditional bootstrap charging solution under the application requirements of high frequency and high power density, the charge of the bootstrap capacitor Cboot is continuously consumed without being replenished in time, which causes an excessive low voltage on the bootstrap capacitor Cboot and affects the high-side drive to not work normally. The results can range from the increase of switching loss of the upper power transistor to the failure of the power MOSFET.